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60-a, 3.3/5-v input, nonisolated wide-output features applications description pth04040w slts238a ? september 2005 ? revised february 2006 adjust power module advanced computing and server applications 60-a output current 3.3-v and 5-v input voltage wide-output voltage adjust (0.8 v to 2.5 v) efficiencies up to 93% on/off inhibit differential output sense output overcurrent protection (nonlatching, auto-reset) overtemperature protection auto-track? sequencing start up into output prebias margin up/down controls operating temperature: ?40 c to 85 c multi-phase, switch-mode topology programmable undervoltage lockout (uvlo) safety agency approvals: ul/cul 60950, en60950, vde (pending) the pth04040w is a high-performance 60-a rated, nonisolated, power module, which uses the latest multi-phase switched-mode topology. this provides a small, ready-to-use module, that can power the most densely populated multiprocessor systems. the pth04040w operates over an input voltage range of 2.95 v to 5.5 v, and can be set to any output voltage over the range, 0.8 v to 2.5 v, using a single external resistor. the combination of a wide input voltage and wide-output adjust range allows the pth04040w to be used in many of high-performance applications. these include advanced computing platforms and servers that utilize either a 3.3-v or 5-v distribution bus. these modules incorporate a comprehensive list of features. they include an on/off inhibit and margin up/down controls. a differential remote output voltage sense ensures tight load regulation, and an output overcurrent and overtemperature shutdown protect against most load faults. a programmable undervoltage lockout allows the turn-on threshold to be customized. the pth04040w incorporates auto-track?. auto-track is a popular feature of the pth family that allows the outputs of multiple modules to track a common voltage during power-up and power-down transitions. this greatly simplifies the sequencing of voltages for vlsi ics that operate off multiple power rails. the double-sided surface mount construction has a low profile and compact footprint. it is available in both throughhole and surface-mount packages. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. auto-track, pola, tms320 are trademarks of texas instruments. production data information is current as of publication date. copyright ? 2005?2006, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. www .ti.com n o m i n a l s i z e = 2 . 0 5 i n x 1 . 0 5 i n ( 5 2 m m x 2 6 , 7 m m )
standard application absolute maximum ratings pth04040w slts238a ? september 2005 ? revised february 2006 these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. a. for c i , a minimum of 1,000 m f (or 2 470 m f) of input capacitance is required for proper operation. b. r set is required to set the desired output voltage from the module higher than the minimum value. c. for c o 1 and c o 2, a minimum of 660 m f (or 2 330 m f) of input capacitance is required load transient regulation. ordering information for the most current package and ordering information, see the package option addendum at the end of this datasheet, or see the ti website at www.ti.com. over operating free-air temperature range (unless otherwise noted) unit signal input voltages track control (pin 18) ?0.3 v to v i + 0.3 v t a operating temperature range over v i range ?40 c to 85 c wave solder surface temperature of module body or pins (5 pth04040wah 260 c (1) t wave temperature seconds) pth04040was 235 c (1) solder reflow t reflow surface temperature of module body or pins temperature pth04040waz 260 c (1) t s storage temperature ?40 c to 125 c mechanical shock per mil-std-883d, method 2002.3, 1 msec, 1/2 sine, mounted 500 g (2) mechanical vibration mil-std-883d, method 2007.2, 20?2000 hz 10 g (2) weight 22.5 grams flammability meets ul94v-o (1) during soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated maximum. (2) qualification limits 2 submit documentation feedback www .ti.com pth04040w 19 20 18 margin down t rack margin up 1215 9 14 1 1 + + + 1 3 5 10 13 16 17 uvlo 46 28 inhibit gnd gnd v oadj ?sense v o +sense udg?05085 a b c c v o c o 1 330 m f c o 2 330 m f r s e t 1%0.05 w c i 1000 m f (required) v i v i 7
electrical characteristics pth04040w slts238a ? september 2005 ? revised february 2006 t a = 25 c, v i = 5 v, v o = 2.5 v, c i = 1000 f, c o = 660 f, and i o = i o max (unless otherwise stated) parameter test conditions min typ max unit i o output current 60 c, 200 lfm airflow 0 60 (1) a v i input voltage range over i o range 2.95 (2) 5.5 v v o tol set-point voltage tolerance 2 (3) %v o d reg temp temperature variation ?40 c < t a < 85 c 0.5 %v o d reg line line regulation over v i range 5 mv d reg load load regulation over i o range 5 mv d reg tot total output variation includes set-point, line, load, ?40 c t a 85 c 3 (3) %v o 2.95 v i 4.5 v (3) 0.8 - 1.65 v o, adj output adjust range v 4.5 v i 5.5 v (3) 0.8 - 2.5 r set = 2.21 k w , v o = 2.5 v 93% r set = 5.49 k w , v o = 1.8 v 90% v i = 5 v, i o = 45 a r set = 8.87 k w , v o = 1.5 v 88% h efficiency r set = 17.4 k w , v o = 1.2 v 86% r set = 6.92 k w , v o = 1.65 v 92% v i = 3.3 v, i o = 45 a r set = 8.87 k w , v o = 1.5 v 91% r set = 36.5 k w , v o = 1 v 87% v r v o ripple (peak-to-peak) 20-mhz bandwidth all voltages 15 mv pp i o trip overcurrent threshold reset, followed by auto-recovery 90 a transient response 1 a/s load step, 50 to 100% i o max, c o = 660 f t rr recovery time 100 s d v tr v o over/undershoot 200 mv margin up down adjust from a given set-point voltage 5% % i il margin margin input current pin to gnd ?8 (4) a i il track track input current (pin 18) pin to gnd ?0.11 (5) ma dv/dt track slew rate capability |v track ? v o | 50 mv and v (track) < v o (nom) 1 v/ms uvlo undervoltage lockout pin 8 open on-threshold 2.6 (6) v hysterisis 0.6 (6) inhibit control (pin 7) referenced to gnd v ih input high voltage 2.5 open (5) v v il input low voltage ?0.2 0.5 i il inhibit input low current pin to gnd 0.5 ma i i inh input standby current inhibit (pin 7) to gnd 60 ma f s switching frequency over v i and i o ranges 675 825 975 khz c i external input capacitance 940 (7) f (1) see soa curves or consult factory for appropriate derating. (2) the nominal input voltage must be at least 2 v o . output voltage regulation is guaranteed with an input voltage within 10% from nominal 3.3 v or 5 v. for example, for v i = 5 v and v o = 2.5 v, the input can vary between 4.5 v and 5.5 v. (3) the set-point voltage tolerance is affected by the tolerance of r set . the stated limit is unconditionally met if r set has a tolerance of 1% with 100 ppm/ c or better temperature stability. (4) a small, low-leakage (<100 na) mosfet is recommended to control this pin. the open-circuit voltage is less than 1 vdc. (5) this control pin has an internal pull-up to v i . if it is left open-circuit the module operates when input power is applied. a small, low-leakage (<100 na) mosfet or open-drain/collector voltage supervisor ic is recommended for control. do not place an external pull-up on this pin. see the application information section for further guidance. (6) these are the default voltages. they may be adjusted using the uvlo prog control input. see the application information section for further guidance. (7) a minimum capacitance of 940 m f is required at the input for proper operation. the capacitance must be rated for a minimum of 400 marms of ripple current. 3 submit documentation feedback www .ti.com
pth04040w slts238a ? september 2005 ? revised february 2006 electrical characteristics (continued) t a = 25 c, v i = 5 v, v o = 2.5 v, c i = 1000 f, c o = 660 f, and i o = i o max (unless otherwise stated) parameter test conditions min typ max unit nonceramic 660 (8) 14000 (9) capacitance value f c o external output capacitance ceramic 400 equivalent series resistance (nonceramic) 2 (10) m w 2.1 mtbf reliability per bellcore tr-332 50% stress, t a = 40 c, ground benign 10 6 hrs (8) a minimum value of output capacitance is required for proper operation. adding additional capacitance at the load will further improve transient response. (9) this is the calculated maximum. the minimum esr requirement often results in a lower value. see the application information section for further guidance. (10) this is the typcial esr for all the electrolytic (nonceramic) output capacitance. use 4 m w as the minimum when using max-esr values to calculate. 4 submit documentation feedback www .ti.com
device information pth04040w slts238a ? september 2005 ? revised february 2006 terminal functions terminal description name no. 1, 3, 5, 10, 13, this is the common ground connection for the v i and v o power connections. it is also the 0 vdc gnd 16 reference for the control inputs. v i 2, 4, 6 the positive input voltage power node to the module, which is referenced to common gnd. v o 9, 12, 15 the regulated positive power output with respect to the gnd node. the inhibit pin is an open-collector/drain negative logic input that is referenced to gnd. applying a lowlevel ground signal to this input disables the module?s output and turns off the output voltage. when inhibit (1) 7 the inhibit control is active, the input current drawn by the regulator is significantly reduced. if the inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. do not place an external pull-up on this pin. a 1%, 0.05-w resistor must be connected between this pin and gnd to set the output voltage higher than the minimum value. the set-point range for the output voltage is from 0.8 v to 2.5 v. the resistor required for a given output voltage may be calculated from the following formula. if left open circuit, the v o adjust 17 module output defaults to its lowest output voltage value. for further information on the adjustment and/or trimming of the output voltage, see the related application information section. note: the specification table gives the preferred resistor values for a number of standard output voltages. the sense inputs allow the regulation circuit to compensate for voltage drop between the module and +sense 11 the load. for optimal voltage accuracy, +sense should be connected to v o . if it is left open, a low-value internal resistor ensures that the output remains in regulation. for optimal voltage accuracy, ?sense should be connected to the ground return at the load. if it is left ?sense 14 open, a low-value internal resistor ensures that the output remains in regulation. connecting a resistor from this pin to signal ground allows the on threshold of the input undervoltage lockout (uvlo) to be adjusted higher than the default value. the hysterisis can also be independenly uvlo prog 8 reduced by connecting a second resistor from this pin to v i . for further information, see the application information section. this is an analog control input that allows the output voltage to follow another voltage during power up and power down sequences. the pin is active from 0 v, up to the nominal set-point voltage. within this range, the module output follows the voltage at the track pin on a volt-for-volt basis. when the control track 18 voltage is raised above this range, the module regulates at its nominal output voltage. if unused, this input should be connected to v i for a faster power up. for further information, see the related application information section. when this input is asserted to gnd, the output voltage is decreased by 5% from the nominal. the input requires an open-collector (open-drain) interface. it is not ttl compatible. a lower percent change can margin down (1) 20 be accommodated with a series resistor. for further information, see the related application information section. when this input is asserted to gnd, the output voltage is increased by 5%. the input requires an open margin up (1) 19 collector (open-drain) interface. it is not ttl compatible. the percent change can be reduced with a series resistor. for further information, see the related application information section. (1) denotes negative logic: open = normal operation; ground = function active 5 submit documentation feedback www .ti.com 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 pthxx040w (t op v iew) 16
typical characteristics (v i = 3.3 v) (1) (2) characteristic data pth04040w slts238a ? september 2005 ? revised february 2006 efficiency output ripple power dissipation vs vs vs load current load current load current figure 1. figure 2. figure 3. temperature derating vs load current figure 4. (1) the electrical characteristic data has been developed from actual products tested at 25 c. this data is considered typical for the converter. applies to figure 1 , figure 2 , and figure 3 . (2) soa curves represent the conditions at which internal components are at or below the manufacturer?s maximum operating temperatures. derating limits apply to modules soldered directly to a 4 inchs 4 inchs double-sided pcb with 1 oz. copper. applies to figure 4 . 6 submit documentation feedback www .ti.com 5 0 6 0 7 0 8 0 9 0 1 0 0 e f f i c i e n c y ? % i l ? load current ? a v o = 1.5 v v o = 1 v 0 10 20 30 40 50 60 i l ? load current ? a output ripple ? mv v o = 1.5 v 0 5 10 15 20 25 v o = 1 v 0 10 20 30 40 50 60 0 3 6 9 1 2 1 5 i l ? load current ? a ? power dissipation ? w p d 0 10 20 30 40 60 50 t a ? ambient t emperature ? c i l ? load current ? a 0 10 20 30 60 400 lfm 200 lfm nat cinv 20 30 40 50 60 70 80 90 40 50
typical characteristics (v i = 5 v) (1) (2) pth04040w slts238a ? september 2005 ? revised february 2006 efficiency output ripple power dissipation vs vs vs load current load current load current figure 5. figure 6. figure 7. temperature derating vs load current figure 8. (1) the electrical characteristic data has been developed from actual products tested at 25 c. this data is considered typical for the converter. applies to figure 5 , figure 6 , and figure 7 . (2) soa curves represent the conditions at which internal components are at or below the manufacturer?s maximum operating temperatures. derating limits apply to modules soldered directly to a 4 inchs 4 inchs double-sided pcb with 1 oz. copper. applies to figure 8 . 7 submit documentation feedback www .ti.com 0 5 1 0 1 5 2 0 2 5 i l ? load current ? a output ripple ? mv 10 20 30 40 60 0 v o = 1.8 v v o = 1.2 v 50 0 3 6 9 1 2 1 5 i l ? load current ? a ? power dissipation ? w p d 0 10 20 30 50 40 60 v o = 1.8 v v o = 1.2 v 5 0 6 0 7 0 8 0 9 0 1 0 0 e f f i c i e n c y ? % i l ? load current ? a v o = 2.5 v v o = 1.5 v v o = 1.2 v v o = 1.8 v 0 10 20 30 40 50 60 t a ? ambient t emperature ? c i l ? load current ? a 20 30 40 50 60 70 80 90 0 10 30 40 50 400 lfm 200 lfm nat cinv v i = 5 v 20 60
application information capacitor recommendations for the pth04040w power module input capacitor output capacitors recommended ceramic capacitors tantalum capacitors pth04040w slts238a ? september 2005 ? revised february 2006 the pth04040w uses state-of-the-art multi-phase power converter topology that employs multiple parallel switching and filter inductor paths between the input and output capacitors. the pth04040w uses three switching paths. the three paths share the total load current, operate at the same frequency, and are evenly displaced in phase. with multiple switching paths the transient output current capability is significantly increased. this reduces the amount of external output capacitance required to support a load transient. the ripple current, as seen by the input and output capacitors, is reduced in magnitude and effectively tripled in frequency. the improved transient response of a multi-phase converter places a bigger burden on the transient capability of the input source. the size and value of the input capacitor is therefore determined by this converter?s transient performance capability. the minimum amount of input capacitance required is 940? m f (2? ?470? m f or 3? ?330? m f), with an rms ripple current rating of 400?ma. this minimum value assumes that the converter is supplied with a responsive, low-inductance input source. this source should have ample capacitive decoupling and be distributed the converter via pcb power and ground planes. for highperformance applications, or wherever the transient capability of the input source is limited, 2,200? m f of input capacitance is recommended. ripple current and less than 100?m w equivalent series resistance (esr) values are the major considerations, along with temperature, when designing with different types of capacitors. unlike polymer tantalum, conventional tantalum capacitors have a recommended minimum voltage rating of 2 (maximum dc voltage + ac ripple). this is standard practice to ensure reliability. for improved ripple reduction on the input bus, ceramic capacitors may be used to complement electrolytic types and achieve the minimum required capacitance. in order to respond with load transients (sudden changes in load current) the regulator requires external output capacitance. the minimum output capacitance is 660 m f (2 330 m f or 1 680 m f) with an esr of at least 2 m w . this output capacitance is required for the module to meet its transient response specification. for most applications, a high quality computer grade aluminum electrolytic capacitor is suitable. these capacitors provide adequate decoupling over the frequency range, 2 khz to 150 khz, and when ambient temperatures are above 0 c. for operation below 0 c, tantalum, ceramic, or os-con type capacitors are recommended. when using one or more nonceramic capacitors, the calculated equivalent esr should be no lower than 4 m w 7 m w using the manufacturer?s maximum esr for a single capacitor. a list of preferred low-esr type capacitors are identified in table 1 . above 150 khz, the performance of aluminum electrolytic capacitors becomes less effective. to further improve, the reflected input ripple current or the output transient response, multilayer ceramic capacitors can also be added. ceramic capacitors have very low esr and their resonant frequency is higher than the bandwidth of the regulator. when used on the output their combined esr is not critical as long as the total value of ceramic capacitance does not exceed 300 m f. also, to prevent the formation of local resonances, do not place more than five identical ceramic capacitors in parallel with values of 10 m f or greater.. tantalum type capacitors can be used at both the input and output, and are recommended for applications where the ambient operating temperature can be less than 0 c. the avx tps, sprague 593d/594/595, and kemet t495/ t510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. as a caution, many general-purpose tantalum capacitors have considerably higher esr, reduced power dissipation and lower ripple current capability. these capacitors are also less reliable when determining their power dissipation and surge current capability. tantalum capacitors that do not have a stated esr or surge current rating are not recommended for power applications. 8 submit documentation feedback www .ti.com
capacitor table designing for very fast load transients pth04040w slts238a ? september 2005 ? revised february 2006 application information (continued) when specifying os-con and polymer tantalum capacitors for the output, the minimum esr limit is encountered before the maximum capacitance value is reached. table 1 identifies the characteristics of capacitors from a number of vendors with acceptable esr and ripple current (rms) ratings. the recommended number of capacitors required at both the input and output buses is identified for each capacitor type. note: this is not an extensive capacitor list. capacitors from other vendors are available with comparable specifications. those listed are for guidance. the rms ripple current rating and esr (at 100khz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. the transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1 a/ m s. the typical voltage deviation for this load transient is given in the data sheet specification table using the minimum required value of output capacitance. as the di/dt of a transient is increased, the response of a converter?s regulation circuit ultimately depends on its output capacitor decoupling network. this is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. if the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitor decoupling. in these cases special attention must be paid to the type, value and esr of the capacitors selected. additional input capcitance may be requried to insure the stability of the input bus during higher current transient di/dt. 9 submit documentation feedback www .ti.com
pth04040w slts238a ? september 2005 ? revised february 2006 application information (continued) table 1. input/output capacitors (1) capacitor characteristics quantity capacitor vendor, max ripple working value max. esr physical input output type series (style) current at vendor part no. voltage (f) at 100 khz size (mm) bus bus 85 c (i rms) panasonic fc (radial) 10 v 1000 0.068 w >1050 ma 10 16 1 1 eeufc1a102 fk (smd) 10 v 1000 0.0650 w 1205 ma 12.5 16.5 1 1 eevfc1a102lq 10 v 1000 0.080 w 850 ma 10 10.2 1 1 eevfk1a102p united chemi-con fx, oscon (radial) 6.3 v 1000 0.013 w 4935 ma 10 10.5 1 1 6fx1000m pxa, (poly-aluminum (smd) 6.3 v 820 0.010 w 5500 ma 10 12.2 2 1 pxa6.3vc820mj12tp psa (poly-aluminum) 10 v 680 0.007 w >5800 ma 10 11.5 2 3 psa6.3vb680mj11 lxz, aluminum (radial) 10 v 1000 0.068 w 1050 ma 10 16 1 1 LXZ10VB102M10X16LL nichicon, aluminum hd (radial) 6.3 v 1000 0.053 w 1030 ma 10 12.5 1 1 uhd0j102mpr pm (radial) 10 v 1000 0.065 w 1040 ma 12.5 15 1 1 upm1a102mhh6 sanyo, os-con sp, (radial) 10 v 470 0.015 w >4500 ma 10x10.5 2 (2) 5 10sp470m svp, (smd) 6.3 v 820 0.012 w >5440 ma 10x12.7 2 43 6svp820m panasonic, poly-aluminum: s/se (smd) 63 v 180 0.005 w 4000 ma 7.3x4.3x4.2 n/r 2 eefse0j181r avx, tantalum, series iii tps (smd) 10 v 470 0.045 w 1723 ma 7,3 l 2 (2) 7 tpse477m010r0045 10 v 470 0.060 w 1826 ma 5,7 w 2 (2) 7 tpsv477m010r0060 4,1 h kemet, poly-tantalum t520 (smd) 6.3 v 470 0.018 w >1200 ma 4,3 w 2 (2) 6 t520x477m006se018 t530 (smd) 10 v 330 0.015 w >3800 ma 7.3 l 3 4 t530x337m010as 6.3 v 470 0.012 w 4200 ma 4 h 2 (2) 3 t530x477m006as vishay-sprague 7.2 l 6 w 595d, tantalum (smd) 10 v 470 0.100 w 1440 ma 4.1 h 2 (2) 7 595d477x0010r2t 94sa, os-con (radial) 16 v 2200 0.015 w 9740 ma 16 25 1 4 94sa108x0016hbp kemet, ceramic x5r (smd) 16 v 10 0.002 w ? 1210 case 1 (3) 9 c1210c106m4pac 6.3 v 47 0.002 w 3225 mm 1 (3) 8 c1210c476k9pac murata, ceramic x5r (smd) 6.3 v 100 0.002 w ? 1210 case 1 (3) 4 grm32er60j107m 6.3 v 47 3225 mm 1 (3) 8 grm32er60j476m 16 v 22 1 (3) 8 grm32er61c226k 16 v 10 9 grm32dr61c106k tdk, ceramic x5r (smd) 6.3 v 100 0.002 w ? 1210 case 1 (3) 4 c3225x5r0j107mt 6.3 v 47 3225 mm 1 (3) 8 c3225x5r0j476mt 16 v 22 1 (3) 8 c3225x5r1c226mt 16 v 10 9 c3225x5r1c106mt (1) capacitor supplier verification 1.please verify availability of capacitors identified in this table. capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. in some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. rohs, lead-free and material details 2.please consult capacitor suppliers regarding material composition, rohs status, lead-free status, and manufacturing process requirements. component designators or part number deviations can occur when material composition or soldering requirements are updated. (2) the total capacitance is slightly lower than 1000 m f, but is acceptable based on the combined ripple current rating. (3) ceramic capacitors can be used to complement electrolytic types at the input to further reduce high-frequency ripple current. 10 submit documentation feedback www .ti.com
adjusting the output voltage of the pth04040w wide-output adjust power (1) pth04040w slts238a ? september 2005 ? revised february 2006 module the v o adjust control (pin 17) sets the output voltage of the pth04040w to a value higher than 0.8 v. the adjustment range is from 0.8 v to 2.5 v. for an output voltage other than 0.8 v a single external resistor, r set 1, must be connected directly between the v o adjust (pin 17) and the output gnd (pin 16) (2) . table 2 gives the preferred value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. for other output voltages, the value of the required resistor is calculated using the following formula, or by selecting from the range of values given in table 3 . figure 9 shows the placement of the required resistor. table 2. preferred values of r set for standard output voltages v out (standard) (1) r set (preferred value) v out (actual) 2.5 v 2.21 w 2.502 v 2 v 4.12 w 2.010 v 1.8 v 5.49 w 1.803 v 1.5 v 8.87 w 1.504 v 1.2 v 17.4 w 1.202 v 1 v 36.5 w 1.005 v 0.8 v open 0.8 v (1) the nominal input voltage must be at least 2 v o . output voltage regulation is guaranteed with an input voltage within 10% from nominal 3.3 v or 5 v. for example, for v i = 5 v and v o = 2.5 v, the input can vary between 4.5 v and 5.5 v. figure 9. v o adjust resistor placement 11 submit documentation feedback www .ti.com r s e t 1 0 k 0 . 8 v v o u t 0 . 8 v 2 . 4 9 k r set 1 % 0 . 0 5 w pth04040w 12 15 9 10 13 16 1 1 14 18 v o v o c o +sense ! sense gnd t r a c k adjust 17 g n d g n d
notes: adjusting the undervoltage lockout (uvlo) of the pth04040w power modules pth04040w slts238a ? september 2005 ? revised february 2006 table 3. output voltage set-point resistor values v out r set v out r set 0.8 open 1.425 10.3 k w 0.825 318 k w 1.45 9.82 k w 0.85 158 k w 1.475 9.36 k w 0.875 104 k w 1.5 8.94 k w 0.9 77.5 k w 1.55 8.18 k w 0.925 61.5 k w 1.6 7.51 k w 0.95 50.8 k w 1.65 6.92 k w 0.975 43.2 k w 1.7 6.4 k w 1 37.5 k w 1.75 5.93 k w 1.025 33.1 k w 1.8 5.51 k w 1.05 29.5 k w 1.85 5.13 k w 1.075 26.6 k w 1.9 4.78 k w 1.1 24.2 k w 1.95 4.47 k w 1.125 22.1 k w 2 4.18 k w 1.15 20.4 k w 2.05 3.91k w 1.175 18.8 k w 2.1 3.66 k w 1.2 17.5 k w 2.15 3.44 k w 1.225 16.3 k w 2.2 3.22 k w 1.25 15.3 k w 2.25 3.03 k w 1.275 14.4 k w 2.3 2.84 k w 1.3 13.5 k w 2.35 2.67 k w 1.325 12.7 k w 2.4 2.51 k w 1.35 12.1 k w 2.45 2.36 k w 1.375 11.4 k w 2.5 2.22 k w 1.4 10.8 k w 1. a 0.05-w rated resistor can be used. the tolerance should be 1%, with temperature stability of 100 ppm/ c (or better). place the resistor as close to the regulator as possible. connect the resistor directly between pins 17 and 16 using dedicated pcb traces. 2. never connect capacitors from v o adjust to either gnd or v o . any capacitance added to the v o adjust pin affects the stability of the regulator. the pth04040w power modules incorporate an input undervoltage lockout (uvlo). the uvlo feature prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. this enables the module to provide a monotonic powerup for the load circuit, and also limits the magnitude of current drawn from the module?s input source during the power-up sequence. the uvlo characteristic is defined by the on-threshold (v thd ) and hysterisis (v hys ) voltages. below the on threshold, the inhibit control is overriden, and the module does not produce an output. hysterisis voltage is the difference between the on and off threshold voltages. it ensures a clean power-up, even when the input voltage is rising slowly. the hysterisis prevents start-up oscillations, which can occur if the input voltage droops slightly when the module begins drawing current from the input source. 12 submit documentation feedback www .ti.com
uvlo adjustment adjustment method (2) (3) features of the pth family of nonisolated wide output adjust power pola? compatibility soft-start power up pth04040w slts238a ? september 2005 ? revised february 2006 the uvlo feature of the pth04040w gives the user the option of adjusting the on-threshold voltage higher than the default value. this might be desirable if the module is powered from a 5-v input bus. this prevents the module from operating until the input bus has risen closer to its regulation voltage. the adjustment method uses the uvlo prog control (pin 8). if the uvlo prog pin is left open circuit, the onthreshold voltage remains at its nominal value of 2.63 v (see electrical specification table). this ensures that the unadjusted module produces a regulated output when the minimum input voltage is applied. the hysterisis voltage is approximately 0.62 v, which correlates to an off-threshold voltage of about 2 v. the magnitude of the hysterisis is automatically set to about 22% of the onthreshold. so if the on-threshold voltage is increased, then the hystersis also increases. figure 10 shows the placement of the resistor, r thd , for adjusting the uvlo on-threshold voltage. it connects from the uvlo prog control pin to gnd. equation 2 determines the value of r thd required to adjust v thd to a new value. the default value is 2.63 v, and it can only be adjusted higher. once the value of r thd has been set, equation 3 is used to determine the new hystersis voltage. figure 10. uvlo program resistor placement modules the pth/ptv family of nonisolated, wide-output adjustable power modules are optimized for applications that require a flexible, high performance module that is small in size. each of these products are pola? compatible. pola-compatible products are produced by a number of manufacturers, and offer customers advanced, nonisolated modules with the same footprint and form factor. pola parts are also assured to be interoperable, thereby providing customers with second-source availability. many of the pola-compatible parts include a feature called auto-track?. auto-track was specifically designed to simplify the task of sequencing the supply voltages in a power system. this and other features are described the following sections. the auto-track feature allows the power-up of multiple pth modules to be directly controlled from the track pin. however in a stand-alone configuration, or when the auto-track feature is not being used, the track pin should be directly connected to the input voltage, v in (see figure 11 ). 13 submit documentation feedback www .ti.com thd r = 12.9 v ? 2.63 thd k w = 2.191 1 + 0.283 v v hys thd r p t h 0 4 0 4 0 w 24 6 1 3 5 v i v i 7 8 uvlo prog inhibit gnd gnd r t h d c 1,000 f i m
overcurrent protection pth04040w slts238a ? september 2005 ? revised february 2006 figure 11. power-up application circuit when the track pin is connected to the input voltage the auto-track function is permanently disengaged. this allows the module to power up entirely under the control of its internal soft-start circuitry. when power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. from the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 5 ms?10 ms) before allowing the output voltage to rise. figure 12. power-up waveforms the output then progressively rises to the module?s setpoint voltage. figure 12 shows the soft-start power-up characteristic of the 22-a output product (pth05020w), operating from a 5-v input bus and configured for a 3.3-v output. the waveforms were measured with a 5-a resistive load and the auto-track feature disabled. the initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. power-up is complete within 15 ms. for protection against load faults, all modules incorporate output overcurrent protection. applying a load that exceeds the regulator?s overcurrent threshold causes the regulated output to shut down. following shutdown, a module periodically attempts to recover by initiating a soft-start powerup. this is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. during this period, the average current flowing into the fault is significantly reduced. once the fault is removed, the module automatically recovers and returns to normal operation. 14 submit documentation feedback www .ti.com 5 v + c330 f o m c1,000 f i m + gnd gnd 3 . 3 v r698 0.1 w , 1% set w pth05020w 7 1 0 4 5 6 2 3 9 t rack v i v o gnd inhibit 1 up dn sense adjust 8 v (1 v/div) o v (1 v/div) i i (5 a/div) i t - t ime = 5 msec/div
overtemperature protection (otp) output on/off inhibit pth04040w slts238a ? september 2005 ? revised february 2006 products with a high output current capability (>20 a), incorporate overtemperature protection. this feature is provided by an on-board temperature sensor that protects the module?s internal circuitry against excessively high temperatures. a rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. if the internal temperature exceeds the otp threshold, the module?s inhibit control is automatically pulled low. this turns the output off. the output voltage drops as the external output capacitors are discharged by the load circuit. the recovery is automatic, and begins with a soft-start power up. it occurs when the the sensed temperature decreases by about 10 c below the trip point. note: the overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. operation at or close to the thermal shutdown temperature is not recommended, and reduces the long-term reliability of the module. always operate the regulator within the specified safe operating area (soa) limits for the worst-case conditions of ambient temperature and airflow. for applications requiring output voltage on/off control, each series of the pth family incorporates an output inhibit control pin. the inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. the power modules function normally when the inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to v in with respect to gnd. figure 13 shows the typical application of the inhibit function. note the discrete transistor (q1). the inhibit control has its own internal pull-up to v i potential. the input is not compatible with ttl logic devices. an open-collector (or open-drain) discrete transistor is recommended for control. figure 13. inhibit control circuit turning q1 on applies a low voltage to the inhibit control and disables the output of the module. if q1 is then turned off, the module executes a soft-start powerup. a regulated output voltage is produced within 20 ms. figure 14 shows the typical rise in both the output voltage and input current, following the turn-off of q1. the turn off of q1 corresponds to the rise in the waveform, q1 vds. the waveforms were measured with a 5-a constant current load. 15 submit documentation feedback www .ti.com pth05020w 1 1 0 4 5 6 2 3 + c 330 f o m c 1,000 f i m + 1 = inhibit gnd v o v i 9 v sense o 8 q1 bss138 r set 7 l oa d gnd
remote sense auto-track? function pth04040w slts238a ? september 2005 ? revised february 2006 figure 14. power-up from inhibit control the remote sense feature allows the regulator to compensate for limited amounts of voltage drop, that may be incurred between the converter and load, due to resistance in the pcb traces. connecting the +sense and ?sense pins to the respective v o and gnd output nodes improves the load regulation of the regulator output at those connection points. this is recommended even if the load circuit is located close to the module. if either the +sense and ?sense are left open-circuit, an internal low-value resistor (15- w or less), connected from the respective sense pin to either v o or gnd, ensures the output voltage remains in regulation. with the sense pins connected, the difference between the voltage measured across the v o and gnd pins of the regulator, and that measured at +sense with respect to +sense, is the amount of ir drop being compensated by the regulator. this should be limited to a maximum of 0.3 v. note: the remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. examples include or-ing diodes, filter inductors, ferrite beads, and fuses. when these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. the auto-track function is unique to the pth/ptv family, and is available with the all pola-compatible products. auto-track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. the sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications, that use dual-voltage vlsi ics such as the tms320? dsp family, micro-processors, and asics. how auto-track? works auto-track works by forcing the module?s output voltage to follow a voltage presented at the track control pin. this control range is limited to between 0 v and the module?s set-point voltage. once the track input is raised above the set-point voltage, the module?s output remains at its set-point 1. as an example, if the track pin of a 2.5-v regulator is at 1 v, the regulated output will be 1 v. but, if the voltage at the track pin rises to 3 v, the regulated output does not go higher than 2.5 v. when the track input is used to connect a number of modules together, it forces the output voltage from each module to follow a common signal during power-up and power-down. the control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit. (3) for convenience, each module?s track input incorporates an internal rc charge circuit. this operates off the module?s input voltage to provide a suitable rising voltage ramp waveform. typical application connecting the track inputs of two or more modules forces their track input to follow the same collective rc ramp waveform, and allows their power-up sequence to be coordinated from a common track control signal. this can be an open-collector (or open drain) device, such as a power-up reset voltage supervisor ic. 16 submit documentation feedback www .ti.com v (2 v/div) o i (2 a/div) i q1vds (5 v/div) t - t ime = 10 msec/div
pth04040w slts238a ? september 2005 ? revised february 2006 to coordinate a power-up sequence the track control must first pulled to ground potential. this should be done at or before input power is applied to the modules. the ground signal should be maintained for at least 10 ms after input power has been applied. this brief period gives the modules time to complete their internal soft-start initialization, enabling them to produce an output voltage. a low-cost supply voltage supervisor ic, that includes built-in time delay, is an ideal component for automatically controlling the track inputs at power up. figure 15 shows how the tps3808g50 supply voltage supervisor ic (u3) can be used to coordinate the sequenced power-up of two 5-v input auto-track modules. the output of the tps3808 supervisor becomes active above an input voltage of 0.8 v, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module?s undervoltage lockout threshold. the ground signal is maintained until approximately 27 ms after the input voltage has risen above u3?s voltage threshold, which is 4.65 v. the 27-ms time period is controlled by the capacitor c3. the value of 4700 m f provides sufficient time delay for the modules to complete their internal soft-start initialization. the output voltage of each module remains at zero until the track control voltage is allowed to rise. when u3 removes the ground signal, the track control voltage automatically rises to the input voltage. this causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. figure 15 shows the output voltage waveforms from the circuit of figure 16 after input voltage is applied to the circuit. the waveforms, v o 1 and v o 2, represent the output voltages from the two power modules, u1 (3.3 v) and u2 (1.8 v), respectively. v trk , v o 1, and v o 2 are shown rising together to produce the desired simultaneous power-up characteristic. the same circuit also provides a power-down sequence. when the input voltage falls below u3's voltage threshold, the ground signal is re-applied to the common track control. this pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in figure 17 . in order for a simultaneous power-down to occur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltage lockout. this is an important constraint. once the modules recognize that a valid input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. during a power-down sequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and the auto-track slew rate. 17 submit documentation feedback www .ti.com
pth04040w slts238a ? september 2005 ? revised february 2006 notes on use of auto-track? 1. the track pin voltage must be allowed to rise above the module?s set-point voltage before the module can regulate at its adjusted set-point voltage. 2. the auto-track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 v/ms. 3. the absloute maximum voltage that may be applied to the track pin is v i . 4. the module does not follow a voltage at its track input until it has completed its soft-start initialization. this takes at least 10 ms from the time that the module has sensed that a valid voltage is present. during this period, the track input should be held at ground potential. 5. the module is capable of both sinking and sourcing current when following a voltage at its track input. therefore startup into an output prebias is not supported when the module is under auto-track control. prebias holdoff is not necessary when all supply voltages simultaneously under the control of auto-track. 6. the auto-track function can be disabled by connecting the track pin to the input voltage (v i ). with auto-track disabled, the output voltage rises at a quicker and more linear rate after input power is applied. figure 15. sequenced power up and power down using auto-track 18 submit documentation feedback www .ti.com + + u1u2 pth05t210w 2, 6 5, 9 3, 4 7, 8 101 1 14 13 1 inh/uvlo gnd gnd t rack tt 12 + + pth04040w 24 6 12 15 9 1 3 5 10 13 16 1 1 14 19 20 18 v i 7 8 uvlo prog inhibit gnd gnd margin up margin down t rack 17 +5 v gnd sense mrct reset 6 5 34 1 2 tps3808g50 c34700 pf u3 +sense v o ?sense v o adj r s e t 1 1.62 k w c o 1 v o 1 = 3.3 v c i 1 v i r t r k # 50 w r t r k # = 100 w /n n = number of track pins connected together v c c c40.1 m f c o 2 c i 2 v o 2 = 1.8 v +sense v o ?sense v i v o adj r s e t 2 5.49 k w
margin up/down controls (4) pth04040w slts238a ? september 2005 ? revised february 2006 figure 16. auto-track simultaneous power up figure 17. auto-track simultaneous power down waveforms waveforms the pthxx060, pthxx010, pthxx020, and pthxx030 products incorporate margin up and margin down control inputs. these controls allow the output voltage to be momentarily adjusted (1) , either up or down, by a nominal 5%. this provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. it can also be used to verify the function of supply voltage supervisors. the 5% change is applied to the adjusted output voltage, as set by the external resistor, r set at the v o adjust pin. the 5% adjustment is made by pulling the appropriate margin control input directly to the gnd terminal 2. a low-leakage open-drain device, such as an n-channel mosfet or p-channel jfet is recommended for this purpose (3) . adjustments of less than 5% can also be accommodated by adding series resistors to the control inputs. the value of the resistor can be selected from table 4 , or calculated using the following formula. up/down adjust resistance calculation where d % = the desired amount of margin adjusted in percent. notes 1. the margin up and margin down controls were not intended to be activated simultaneously. if they are activated simultaneously, the effects on the output voltage may not completely cancel, resulting in the possibility of a higher error in the output voltage set point. 2. the ground reference should be a direct connection to the module gnd at pin 7 (pin 1 for the pthxx050). this produces a more accurate adjustment at the load circuit terminals. the transistors q1 and q2 should be located close to the regulator. 3. the margin up and margin down control inputs are not compatible with devices that source voltage. this includes ttl logic. these are analog inputs and should only be controlled with a true open-drain device (preferably discrete mosfet transistor). the device selected should have low off-state leakage current. each input sources 8 a when grounded, and has an open-circuit voltage of 0.8 v. 19 submit documentation feedback www .ti.com t ? t ime ? 20 ms/div v t r k (1 v/div) v 0 1 (1 v/div) v 0 2 (1 v/div) t ? t ime ? 200 m s/div v t r k (1 v/div) v 0 1 (1 v/div) v 0 2 (1 v/div) d % r or r = u d 499 - 99.8 k w
prebias startup capability pth04040w slts238a ? september 2005 ? revised february 2006 table 4. margin up/down resistor values % adjust r u / r d 5 0 k w 4 24.9 k w 3 66.5 k w 2 150.0 k w 1 397.0 k w figure 18. margin up/down application schematic a prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. this often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an fpga or asic. another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. a prebias can cause problems with power modules that incorporate synchronous rectifiers. this is because under most operating conditions, these types of modules can sink as well as source output current. the pth/ptv family of power modules incorporate synchronous rectifiers, but does not sink current during startup (1) , or whenever the inhibit pin is held low. however, to ensure satisfactory operation of this function, certain conditions must be maintained (2) . figure 20 shows an application demonstrating the prebias startup capability. the start-up waveforms are shown in figure 19 . note that the output current from the pth03010w (i o ) shows negligible current until its output voltage rises above that backfed through diodes d1 and d2. note: the prebias start-up feature is not compatible with auto-track. when the module is under auto-track control, it sinks current if the output voltage is below that of a back-feeding source. to ensure a prebias hold-off, one of two approaches must be followed when input power is applied to the module. the auto-track function must be disabled (3) , or the module?s output held off (for at least 50 ms) using the inhibit pin. either approach ensures that the track pin voltage is above the set-point voltage at start up. notes 1. startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise of the output voltage under the module?s internal soft-start control. startup is complete when the output voltage has risen to either the set-point voltage or the voltage at the track pin, whichever is lowest. 2. to ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the inhibit control pin), the input voltage must always be greater than the output voltage throughout the powerup and power-down sequence. 3. the auto-track function can be disabled at power up by immediately applying a voltage to the module?s track pin that is greater than its set-point voltage. this can be easily accomplished by connecting the track 20 submit documentation feedback www .ti.com + c i v i gnd margin down q2 q1 + margin up 0 v +v o +v o c o r d r u (t op v iew) pth05010w 1 2 1 0 7 6 5 4 3 gnd r 0.1 w , 1% set lo a d 9 8
pth04040w slts238a ? september 2005 ? revised february 2006 pin to v in . figure 19. pre-bias startup waveforms figure 20. application circuit demonstrating prebias startup 21 submit documentation feedback www .ti.com v (1 v/div) i v (1 v/div) o i (5 a/div) o t - t ime = 5 msec/div v = 3.3 v i v = 2.5 v o r2 2 k 2 1 a s i c v c o r e v c c i o i o p t h 0 3 0 1 0 w 1 1 0 4 5 6 2 3 9 t rack v i v o gnd inhibit 7 v a d j s e n s e + c330 f i m c330 f o m + + 8

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